Gearlink’s 400-Gbps QSFP-DD DR4 Optical Transceiver Module with Quad Small Form-Factor Pluggable. Double Density (QSFP-DD) form-factor is of high performance in bi-directional signal transmission and aggregate 400Gbps bandwidth, which is designed to follow QSFP DD MSA and 400GBASE-DR4 of IEEE 802.3bs standard and ultra-low power consumption of 8 W for 400G QSFP-DD D`R4+ are also proven.
Compared with the conventional copper-based direct attach cables (DACs), the 400g dr4 optical fiber with pluggable MPO connector enables the ease of complicated data center cabling deployment by the longer, lighter, and bendable characteristics. The 400g dr4 transceiver module utilizes high-performance 1310-nm EML and PIN PDs with superior integration in signal integrity and optical sub-assembly, whose bit-error rate is better than 2.4 E-4 for reliable packet communication within the data center.
Not necessarily applied together. Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
Parameter | Min | Max | Unit | Note |
Storage Temperature | -40 | 85 | oC | |
3.3V Power Supply Voltage | -0.5 | 3.6 | V | |
Data Input Voltage- Single Ended | -0.5 | Vcc+0.5 | ||
Control Input Voltage | -0.5 | 3.6 | V | |
Relative Humidity | 5 | 85 | % | |
Rx Optical Damage Threshold / Lane | 5 | dBm |
Notes of 400g dr4 mpo qsfp:
1. Non-condensing.
Parameter | Min | Typical | Max | Unit | Note |
Case Operating Temperature | 0 | 70 | oC | ||
Power Supply Voltage | 3.135 | 3.3 | 3.465 | V | |
Date Rate per Channel | 53.125 | Gbps | |||
Bit Error Ratio (BER) | 2.4x10-4 | 1, 2 | |||
Control Input Voltage High | 2 | Vcc+0.3 | V | ||
Control Input Voltage Low | -0.3 | 0.8 | V | ||
Two-Wire Serial (TWS) Interface Clock Rate | 1 | MHz | |||
Differential Data Input / Output Load | 100 | Ohms | +/- 10% | ||
Link Distance | 500 | m |
Notes of 400g dr4 :
1. Bit-Error-Rate (BER) is tested with the PRBS 31Q pattern.
2. 400G QSFP-DD DR4 requires an electrical connector compliant with QSFP-DD MSA which is used on the host board in order to guarantee its electrical interface specification.
